1. Field of the Invention
The present invention relates generally to electronic digital logic circuits, and more particularly, to an output circuit responsive to a trigger input pulse for providing an output pulse used to drive succeeding logic circuits.
2. Description of the Prior Art
A variety of integrated circuits are presently available which include at least one trigger input terminal pin or clock input terminal pin for causing the integrated circuit to initiate some form of action therein in response to the receipt of a trigger input pulse or clock signal. More particularlY, the trigger input signal or clock signal typically switches betWeen a low logic level (for example, round potential) and a high logic level (for example, a positive power supply voltage), and the integrated circuit is responsive to a particular transition or edge of the trigger input signal or clock signal. When the action taken bY the integrated circuit is initiated upon detection of a transition of the trigger input signal from a low logic level to a high logic level, the circuit is said to be "positive-edge triggered", and a positive-going pulse must be provided to the trigger input terminal of the integrated circuit in order to initiate such action. ConverselY, an integrated circuit which initiates such action upon detecting a transition of the trigger input signal from a high logic level to a low logic level is said to be "negative-edge triggered" and requires the receipt of a negative-going pulse at its trigger input terminal in order to initiate such action. Common integrated circuits which are responsive to trigger input signals or clock signals include latches, flip-flops and monostable multivibrators (or one-shots).
When a circuit designer is creating the design for a new integrated circuit product, the designer must consider the requirements of other integrated circuits which the new integrated circuit may be used to drive. More specifically, if the new integrated circuit being designed provides an output pulse Which might be used as a trigger or clock for an input terminal of a next-succeeding integrated circuit, the circuit designer must consider Whether the output pulse should be generated as a positive-going trigger pulse or a negative-going trigger pulse. However, in many cases, the integrated circuit manufacturer desires that the new integrated circuit Will be useful with a wide variety of other circuits, some of which require a positive going trigger or clock pulse input, and others Which require a negative-going trigger or clock pulse input. In the past, circuit designers have dealt with this problem by providing not one, but two, output pulse terminals, one of which provides a positive-going output trigger pulse, and the second of which provides a negative-going output trigger pulse. In this manner, users of such an integrated circuit may select either of such output terminals for coupling to a next succeeding integrated circuit.
While the provision of two output pulse terminals as described above relieves the integrated circuit designer from deciding whether the output pulse should be positive-going or negative-going, the requirement for two output terminal pins poses an obvious disadvantage. As integrated circuits become more complex, the number of electrical connections which must be made between the integrated circuit and the outside world typically becomes greater. Due to integrated circuit packaging limitations, integrated circuit design is often limited by the number of terminal pins available in a particular integrated circuit package. Accordingly, integrated circuit designers strive to make the most economical use of the terminal pins provided in a particular package; the dedication of two output terminals pins to provide positive-going and negative-going trigger output pulses for the same basic output signal is wasteful and maY limit the number of functions which the integrated circuit can provide.
Yet another disadvantage arises when an integrated circuit is provided with two output terminal pins for providing positive-going and negative-going trigger output pulses of the same basic output signal. Often, users of such integrated circuits inadvertently select the wrong output terminal when attempting to interconnect the integrated circuit to other integrated circuits. When the user selects the wrong output pulse terminal for coupling to the trigger input of a next-succeeding integrated circuit, the user must devote valuable time to detecting and correcting the problem by selecting the proper output pulse terminal for connection to the trigger input terminal of the next-succeeding integrated circuit.
U.S. Pat. No. 3,593,169 (Markow) discloses a tone burst generator which produces a positive pulse output followed by a negative pulse output in response to the receipt of a single trigger input pulse. HoWever, the circuit disclosed in the Markow patent creates a positive pulse starting and ending at zero volts, and a negative pulse starting and ending at zero volts, and the output terminal is held at zero volts in the absence of a trigger input pulse. While such a circuit may be useful for driving alternating current transmission lines, such as telephone lines and the like, such an output circuit would not be practical for driving succeeding stages of digital logic integrated circuits, since the negative-going output pulse lies entirely below the input switching threshold of a next-succeeding digital logic integrated circuit.
Accordingly, it is an object of the present invention to provide an output circuit which may be used with conventional digital logic integrated circuits and which provides a pulsed output signal which may, in turn, be used to drive a trigger input terminal of a next-succeeding integrated circuit, irrespective of whether the next-succeeding integrated circuit requires a positive-going trigger input pulse or a negative-going trigger input pulse.
It is another object of the present invention to provide such an output circuit which requires only a single output terminal which may be directly interconnected with a trigger input terminal of a next-succeeding integrated circuit, irrespective of whether the next-succeeding integrated circuit requires a positive-going trigger input pulse or a negative-going trigger input pulse.
It is still another object of the present invention to provide such an output circuit which avoids the possibility of end-users inadvertently connecting the input terminal of a next-succeeding integrated circuit to the Wrong output pulse terminal of a pair of such output pulse terminals.
It is a further object of the present invention to provide such an output circuit which eliminates the need for a circuit designer to consider the polarity of the input pulse trigger requirements of next-succeeding integrated circuits to be driven by such an output circuit.
It is a still further object of the present invention to provide such an output circuit Which, through the addition of a single external, passive component, can provide either a positive-going output pulse or a negative-going output pulse.
These and other objects of the present invention will become more apparent to those skilled in the art as the description thereof proceeds.